{
    "ModuleConfig": {
        "ModuleMeta": {
            "displayName": "VMMR-8/16",
            "eventHeaderFilter": "0100 XXXX MMMM MMMM XXXX SSSS SSSS SSSS",
            "typeId": 9,
            "typeName": "vmmr",
            "variables": [
            ],
            "vendorName": "mesytec",
            "vmeAddress": 0
        },
        "baseAddress": 0,
        "enabled": true,
        "id": "{cd891ab2-91ff-472b-81b4-b4ca49c32df8}",
        "initScripts": [
            {
                "enabled": true,
                "id": "{55412d31-88e8-4a83-b8db-43da540921d3}",
                "name": "Module Init",
                "properties": {
                    "icon": ":/vme_script.png"
                },
                "variable_table": {
                    "name": "",
                    "variables": {
                    }
                },
                "vme_script": "## Parameters for VMMR, Firmware starting with FWx110, MMR modules with 1ns time stamp\n#\t\tMMR modules starting with MMR_MB V15(VCXO) can be software upgraded\n\n# Operation Mode\n# Set timing resolution. \n0x6046 1\t\t\t# MMR-time stamp with 1ns resolution, ext trigger timing 1ns, trigger out 5ns\n#\t\t\t\t    # requires MMR modules with 1ns resolution (V15 and up, with actual FW (0x0020)\n#\t\t\t\t\t# window of interest unchanged, continues to work with 5ns steps\n#\t\t\t\t\t# with 1ns setting, time stamp length = 16 bits\n# ############################################################################\n# active_buses\n0x6042  0x0003      # A '1' bit means bus active. Reading returns the buses\n                    # that where activated at DAQ start time.\n\n# Trigger Setup\n# ############################################################################\n# win_start\n0x6050  $(4096 - (200 / 5)) # here: -200ns \n\t\t\t        # win_start = 4096 + delay[ns] / 5;\n\t\t\t\t\t# Unit: 5ns, Default: 0x1000 - 32 = 4064\n                    # 0x0000 -> start at -20.48 us\n                    # 0x1FFF -> start at +20.48 us\n                    # 0x1000 -> 4k = 4096, no delay\n                    # < 4k (0x1000) -> window starts before trigger\n                    # > 4k (0x1000) -> window is delayed\n\n# win_width (12 bit value)\n0x6054  $(1320 / 5)  # win_width = width[ns] / 5; Unit: 5 ns, max 4k -> 20.48 us\n\n# ext_trig_source\n0x6058  0b00        # trig1/trig0 to trigger gate\n\n# trig_source\n# Allows selecting which channels create a trigger.\n# Bit 0 corresponds to channel 0, bit 15 to channel 15.\n# A '1' value means the channel is a trigger source.\n0x605A  0b0000'0000'0000'0001\n\n# out_trigger_source\n0x605C  0           # 0 -> free trigger to trig output\n                    # 1 -> accepted trigger to trig output\n\n# trigger_output (at NIM1 output)\n# If 0x605C (out_trigger_source) = 0:\n# Bit 0 corresponds to channel 0, bit 15 to channel 15.\n# A '1' value means the channel is a source for output trigger.\n0x605E  0xFF\t# FF all buses create output trigger\n\n\n# I/O\n# ############################################################################\n# Sorted from top to bottom, as on the front panel.\n\n# ECL3 input\n0x6060  0x00        # lower 4 bits:\n                    #   0 -> Off, 1 -> trig0_in\n                    # upper 4 bits:\n                    #   0 -> terminated, 1 -> unterminated\n                    #** example 0x11 =  terminated,trigger in\n\n# ECL2 input \n0x6062  0x00        # lower 4 bits:\n                    #   0 -> Off, 1 -> sync_in, 2 -> trig1_in\n                    # upper 4 bits:\n                    #   0 -> terminated, 1 -> unterminated\n                    # When sync_in is selected also set reg 0x6096!\n\n# ECL1 input \t\t\n0x6064 0x00         # lower  4 bits: \n                    #   0 = Off, 1 = Reset_in\n                    # upper 4 bits: \n                    #   0 = terminated, 1 = unterminated\n\n# ECL0 output\n0x6066  0           # 0 -> off\n                    # 4 -> busy\n                    # 8 -> data in buffer above threshold 0x6018 (= Data ready)\n                    # 9 -> events in buffer above threshold 0x601E\n\n# NIM3 input\n0x6068  1           # 0 -> off\n                    # 1 -> trig0_in\n\n# NIM2 input\n0x606A  1           # 0 -> off\n                    # 1 -> trig1_in\n                    # 2 -> sync_in\n                    # When sync_in is selected also set reg 0x6096!\n\n# NIM1 \n0x606C  1           # 1 -> high resolution [1ns] trigger out\n                    # 5 -> trigger group defined by 0x631C out\n\n# NIM0 output\n0x606E  4           # 0 -> off\n                    # 1 -> CBus\n                    # 4 -> busy_out (== FIFO full or ACQ stopped)\n\t\t\t\t\t# 5 -> trigger group defined by 0x631A out\n                    # 8 -> data in buffer above threshold 0x6018\n                    # 9 -> events in buffer above threshold 0x601E\n\n\n# Timestamp/Event Counters: CTRA, CTRB\n# ############################################################################\n# ts_sources\n0x6096  0b00        # bit 0: frequency source (0 -> VME, 1 -> external)\n                    # bit 1: external reset enable\n                    # For RCP, QDC: bit4 -> CTRB counts trigger outputs (= free\n                    # triggers, selected by 0x605E\n\n# ts_divisor (16 bit value)\n0x6098  1           # timestamp = time / ts_divisor\n                    # 0 means division by 65536\n\n# stop_ctr\n#0x60AE  0b00       # bit 0: stop CTRB (time_0, time_1, time_2)\n                    # bit 1: stop CTRA (ts_counter_lo, ts_counter_hi)\n                    # with 0 -> run, 1 -> stop counter\n"
            },
            {
                "enabled": true,
                "id": "{ada9f6ad-25f2-4c84-ab26-3c22bdc02453}",
                "name": "Frontend Settings",
                "properties": {
                    "icon": ":/vme_script.png"
                },
                "variable_table": {
                    "name": "",
                    "variables": {
                    }
                },
                "vme_script": "# Front end settings (Channel Addressing)\n# ############################################################################\n\n# select_bus\n#0x6100  0          # 0..15 selects individual buses,\n                    # 16 selects all (only write to bus is possible)\n\n# fe_bus_address (0..255)\n#0x6110  0           # Subaddress in frontend -> see MMR specification\n\n# fe_addr (16 bits)\n#0x6112  0           # Write access: Data write register\n#                    # Read access: request data\n\n# 0x6116 read_address:  requested data: Frontend: Address[7:0]\n# 0x6118 read_data:     requested data: Frontend: Data[15:0]\n\n# Longest connected bus (POF fiber)\n0x611A 50    \t# 50 = 10m of fiber bus length\n\t\t\t\t# required for window of interest coincidence\n\n# ******* SET REGISTERS OF FRONTEND MODULES ***********\n0x6100  16      # for all frontends\n\n0x6110  0xC     # address pulser register\n0x6112  0       # switch local pulser off; Suggestion: only use 0x6070 pulser register\n\n# usually set the two threshold registers to the same value:\n# thresholds are adjusted to give a low or no trigger rate with no particles\n0x6110  0x9     # threshold register for lower 32 channels of one bank\n0x6112  35      # (35 =about 10%)max value 255 = 70% full range\n0x6110  0xA     # threshold register for higher 32 channels of one bank\n0x6112  35      # max value 255 = 70% full range\n0x6110  0xB     # threshold register for higher 32 channels of one bank\n0x6112  35      # max value 255 = 70% full range\n\n# the data threshold is adjusted to reduce data by eliminating non responding channels\n0x6110  0x10    # data threshold register\n0x6112  200     # = 5% full range; Directly works on ADC-range; Max value 4095\n\n\n# Internal Test Pulser (Pulser to all connected buses, synchronous)\n# ############################################################################\n# pulser_status\n0x6070  0       # 0 -> off, 1 -> on, 3 -> generate trigger but no amplitude data\n\n# pulser_amplitude\n0x6072  0x7F    # half amplitude: 0xFF = 127 (max =255)\n\n# Frontend module registers\n# ############################################################################\n#\n#  +---------+------------------+-------+----------+---------------------------------------------------+\n#  | Address | Function         | Width | R/W      | Description                                       |\n#  +=========+==================+=======+==========+===================================================+\n#  | 0x01    | reset            | 0     | W        | resets frontend data                              |\n#  +---------+------------------+-------+----------+---------------------------------------------------+\n#  | 0x03    | LEDs_on          | 1     | W        | activate onboard LEDs                             |\n#  +---------+------------------+-------+----------+---------------------------------------------------+\n#  | 0x04    | start            | 1     | R/W      | accept trigger, stop also clears buffers          |\n#  +---------+------------------+-------+----------+---------------------------------------------------+\n#  | 0x05    | temp             | 9     | R        | temperature in Kelvin                             |\n#  +---------+------------------+-------+----------+---------------------------------------------------+\n#  | 0x06    | voltage          | 10    | R        | primary voltage in 100mV                          |\n#  +---------+------------------+-------+----------+---------------------------------------------------+\n#  | 0x07    | receiver_power - | R     | ...      | DACB, bank0                                       |\n#  +---------+------------------+-------+----------+---------------------------------------------------+\n#  | 0x08    | pulser_ampl -    | -     | DACA     | DACC, bank1                                       |\n#  +---------+------------------+-------+----------+---------------------------------------------------+\n#  | 0x09    | com_thr0         | -     | -        |                                                   |\n#  +---------+------------------+-------+----------+---------------------------------------------------+\n#  | 0x0A    | com_thr1         | -     | -        |                                                   |\n#  +---------+------------------+-------+----------+---------------------------------------------------+\n#  | 0x0C    | pulser_ping      | -     | -        | Bit1: 1 -> periodic, 0 -> one                     |\n#  |         |                  |       |          | Bit2: 1 -> trigger, 0 -> tailpulse                |\n#  |         |                  |       |          | Data: ping time[15:0],                            |\n#  |         |                  |       |          |  High bit: 1 -> time controlled, 0 -> immediately |\n#  +---------+------------------+-------+----------+---------------------------------------------------+\n#  | 0x10    | data_threshold   | -     | -        | data below are supressed[11:0]                    |\n#  +---------+------------------+-------+----------+---------------------------------------------------+\n#  | 0x21    | peak_delay       | -     | -        | maximum possible delay between trigger and shaper |\n#  |         |                  |       |          | peak                                              |\n#  +---------+------------------+-------+----------+---------------------------------------------------+\n#  | 0x22    | active_bank      | 16    | -        | XXX: write me                                     |\n#  +---------+------------------+-------+----------+---------------------------------------------------+\n#  | 0x23    | bus error count  | 16    | -        | XXX: write me                                     |\n#  +---------+------------------+-------+----------+---------------------------------------------------+\n\n\n#****************** Only for factory setting. Do not use!! ******************************\n#0x6110  0x21\t# peak delay, multiples of 10ns\n#0x6112\t 40\t\t# 40 for 160ns shaping time\n\n#0x6110  0x22\t# bank layout\n#0x6112\t 0x8421\t# 0x0021 = 2 Banks #0x8421 = 4 banks"
            },
            {
                "enabled": true,
                "id": "{b7b01029-f5fe-430e-bcfb-34b768479359}",
                "name": "VME Interface Settings",
                "properties": {
                    "icon": ":/vme_script.png"
                },
                "variable_table": {
                    "name": "",
                    "variables": {
                    }
                },
                "vme_script": "# Settings related to the readout loop\n# #####################################\n# Trigger output via IRQ-lines at Backplane;\n# Each bit corresponds to one of the buses channels.FOR VMMR-8 only lower 8 bits are used\n# 0x6300 0b1111'1111'1111'1111  # IRQ 1\n# 0x6304 0b1111'1111'1111'1111  # IRQ 2 \n# 0x6308 0b1111'1111'1111'1111  # IRQ 3\n# 0x630C 0b1111'1111'1111'1111  # IRQ 4\n# 0x6310 0b1111'1111'1111'1111  # IRQ 5\n# 0x6314 0b1111'1111'1111'1111  # IRQ 6\n# 0x6318 0b1111'1111'1111'1111  # IRQ 7\n 0x631A 0b1111'1111'1111'1111  # NIM 0\t// also select NIM signal source 0x606E = 5\n 0x631C 0b1111'1111'1111'1111  # NIM 1 // also select NIM signal source 0x606C = 5\n#######################################\n0x6010  ${sys_irq}                          # irq level\n\n# IRQ_source and thresholds\n#0x601C 1                               # 1 -> specifies number of words\n#0x6018  100                            # IRQ-FIFO threshold, words\n0x601C 0                                # 0 -> the following register specifies the number of events\n0x601E $(${mesy_readout_num_events} + 2)    # IRQ-FIFO threshold, events\n\n# marking_type\n0x6038 ${mesy_eoe_marker}               # End Of Event marking\n                                        # 0 -> event counter\n                                        # 1 -> time stamp\n                                        # 3 -> extended time stamp\n\t\t\t\t\t\t\t\t\t\t# !!!!! From FWX112 extended time stamp marker\n\t\t\t\t\t\t\t\t\t\t#  is changed to 0x208xxxx to distinguish from bus time stamp \"0x2A0xxxx\n\n# multi event mode:\n0x6036 0xb                              # 0x0 -> single event\n                                        # 0x3 -> multi event, number of words\n                                        # 0xb -> multievent, transmits number of events specified\n\n# max_transfer_data\n0x601A ${mesy_readout_num_events}            # multi event mode == 0x3 -> Berr is emitted when more or equal the\n                                        #   specified number of words have been sent and \"End Of Event\" is detected.\n                                        # multi event mode == 0xb -> Berr is emitted when the specified number\n                                        #   of events has been transmitted.\n\n# Stop the module from accepting triggers and clear the readout FIFO.\n# Acquisition will be started simultaneously for all modules in the parent\n# event by the \"Multicast DAQ Start\" script.\n0x603a 0   # stop acq\n0x603c 1   # FIFO reset\n0x6034 1   # readout reset\n\n# MCST - Multicast Setup\n# #####################################\n0x6020 0x80                             # Enable multicast\n0x6024 0x${mesy_mcst}                        # Set 8 high bits of MCST address\n"
            }
        ],
        "name": "vmmr",
        "type": "vmmr",
        "variable_table": {
            "name": "",
            "variables": {
            }
        },
        "vmeReadout": {
            "enabled": true,
            "id": "{86b73005-7ff7-4598-9921-4edb331181c5}",
            "name": "Module Readout",
            "properties": {
                "icon": ":/vme_script.png"
            },
            "variable_table": {
                "name": "",
                "variables": {
                }
            },
            "vme_script": "# BLT readout until BERR or number of transfers reached\nmbltfifo a32 0x0000 65535\n"
        },
        "vmeReset": {
            "enabled": true,
            "id": "{ec5fc45f-0a35-4a2a-a187-eac2961e4944}",
            "name": "Module Reset",
            "properties": {
                "icon": ":/vme_script.png"
            },
            "variable_table": {
                "name": "",
                "variables": {
                }
            },
            "vme_script": "# Reset the module\n0x6008 1\nwait 500ms\n## Get Module ids for log file\nprint \"Hardware ID:\"\nread a32 d16 0x6008\t# hardware ID\nprint \"Firmware Revision:\"\nread a32 d16 0x600E # firmware revision\n\n0x603a 0   # stop acq\n0x603c 1   # FIFO reset\n0x6034 1   # readout reset\n"
        }
    }
}
